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Features
* Driver Stages
- Four DMOS 150 mA Low-side Relay Drivers with Current Limitation - One Gate Driver for External N-channel FET with Charge Pump and Bootstrap - Two Universal Outputs (10 mA High Side and 60 mA Low Side) - One 20 mA Warning Lamp Driver * Power Supplies - 5V/150 mA Linear Regulator - 5V/30 mA Linear Regulator (also Active in Standby Mode) - Internal Power Supply - Switchable System Supply Voltage Output * Monitoring and Protection - 12V Monitoring - Watchdog with Reset - Two Comparators for Current Measurement - Adjustable Undervoltage Warning Level - Overtemperature Protection with Hysteresis - Two 5V Comparators - Wide Supply Voltage Range from 5.8V up to 26V - 8-bit SPI Interface - Low Current Consumption in Standby Mode 80 A - TTL and CMOS Compatible Inputs - 2 kV ESD Protection - Transient Protection According to ISO/TR 7637-1 Level 4 (Except Load Dump)
Automotive Failsafe System IC ATA6814 Preliminary
Applications
As an Automotive Failsafe System IC, the ATA6814 is ideal for driver and monitoring functions in ambitious solutions with increased safety requests such as parking brakes, power steering, and other applications with DC motor control.
Rev. 4849B-AUTO-09/05
1. Description
The ATA6814 is a monolithically-integrated multi-functional IC designed in Atmel's state-of-the-art 0.8 m BCDMOS technology. With its built-in driver stages, voltage supplies and monitoring functions, it is an ideal cost saving failsafe system IC. The communication with an external microcontroller is provided by an 8-bit SPI interface. Four protected and current limited driver stages are available to control relays and additionally there is a gate driver including charge pump and bootstrap to control an external FET. Three LEDs for status information can be controlled via three separate outputs: The high-side driver at pin OUTP has monitoring functions for overcurrent and current threshold. The low-side drivers at the pins WLN and OUTN also have monitoring functions for overcurrent, current threshold, and voltage monitoring. Two internal bandgap references control and monitor two independent 5V supply voltages. In standby mode the internal IC-supply is provided by one of them; the other one is switched off, in order to reduce the power consumption to a minimum. All internal blocks are supplied by a specific internal voltage regulator. The system supply voltage and all internally-generated voltages are monitored and in case of over or undervoltage all drivers are switched off. Via the SPI the system supply voltage can be switched to provide power for external components. The car battery voltage (KL 30) is monitored by an adjustable monitoring function. An oscillator with an external RC circuitry and a fully-integrated auxiliary oscillator which can be set via the pin RREF are the clock references for the watchdog and all other time constants. Both oscillators monitor each other. The independent watchdog circuitry monitors the microcontroller's correct operation. Two differential amplifiers support the use of external A/D converters for current measurement. Two comparators are provided to monitor the 5V supply of external devices like sensors.
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ATA6814 [Preliminary]
4849B-AUTO-09/05
ATA6814 [Preliminary]
Figure 1-1. Block Diagram
WLP UVM UVR UVW WLN OUTN OUTP
Battery undervoltage monitor 12V Over/ CtrL undervoltage monitor CtrL
Universal lowside Driver CtrL
Universal lowside Driver CtrL
Universal highside driver CtrL
CtrL
Highside gate driver with charge pump
BSC TCFET
V12
CtrL
Lowside driver
RD1
V12S ERD CSN DI DO CLK VRE EK15 E5
12V switch
CtrL
Lowside driver
RD2
Control Logic
8-Bit SPI CtrL
(CtrL)
CtrL Bandgap reference CtrL Overtemperature monitor CtrL CtrL CtrL
Lowside driver
RD3
Enable
Lowside driver
RD4
VI
Internal voltage regulator Main 5V voltage regulator Auxiliary 5V voltage regulator Watchdog oscillator
Current measurement comparator Current measurement comparator Voltage monitoring comparator 1 Voltage monitoring comparator 2
B1CI B1CG B1CO B2CI B2CG B2CO C1I C1O C2I C2O
B5 V5
Voltage monitoring
CtrL Fully integrated main oscillator
CtrL
B5A V5A
CtrL Bandgap reference
RCOS WDT RSTN RESAN RESN
IREF
CtrL
CtrL
Watchdog with reset function
CtrL
Current bias for all blocks
Test
A
LP GND
RREF
TEST
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4849B-AUTO-09/05
Figure 1-2.
K30 DK30
Application Circuit
K30P K15ext K15
CK30 100 nF
47 F
QU5 STD1802 CV5
QU5A BC817-40 CV5A 4.7 F
DWLN RWLN 2.7 k WLN VI VI CVI 100 nF
DOUTN ROUTN 2.7 k
ROUTP 2.7 k DOUTP
DK15
RUVM 510 V12 B5 V5
10 F
B5A V5A
WLP WLN
OUTN
V12S
OUTP BSC TCFET CBS1 47 nF CBS2 RTC1 47 nF 10 k RTC2 10 k
UVM RUV1 1 k UVR RUV2 2.5 k
MTCFET1
VI ROS 100 k
UVW
RD1 RL1
RL1 8.2
K30P
M M1
RCOS
COS 1 nF RD2 RREF RREF 10 k EK15 P E5 P WDT P RSTN P RESAN P P CSN P CLK P DI P DO P C1O P C2O P C2I P C1I P ERD VRE GNDA GNDL TEST GNDP B2CO ADC B2CG RL24 20 k 1 k RD4 B2CI RL23 20 k 1 k RL22 RL25 0.01 RL4 RL21 MR34 P K30P RD3 RESN RL3 B1CO ADC RL2 8.2 B1CG RL14 20 k 1 k MTCFET2 K30 B1CI RL13 20 k 1 k RL12 RL15 0.01 RL2 RL11 MR12 P
M M2
4
ATA6814 [Preliminary]
4849B-AUTO-09/05
ATA6814 [Preliminary]
2. Pin Configuration
Figure 2-1. Pinning QFN48
B2CG B2CI B2CO B1CG B1CI B1CO C20 GNDL C10 VRE DO DI C2I OUTN C1I RD4 RD3 GNDP RD2 RD1 V12S V12 OUTP WLN 24 23 22 21 20 19 18 17 16 15 14 13 12 25 11 26 10 27 9 28 8 29 7 30 6 31 5 32 4 33 3 34 2 35 1 36 37 38 39 40 41 42 43 44 45 46 47 48
ATA6814
CLK CSN RCOS E5 EK15 UVM TEST UVR GNDA RREF RESN RSTN
Table 2-1.
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
Pin Description
Symbol RSTN RESN RREF GNDA UVR TEST UVM EK15 E5 RCOS CSN CLK DI DO VRE C1O GNDL C2O B1CO B1CI B1CG Function Reset input Reset output Reference resistor Analog ground Undervoltage reference input Test Undervoltage measurement input Enable (K15 based) Enable (5V based) Resistor-capacitor oscillator Chip-select input Clock input Data input Data output External voltage regulator output Comparator 1 output Logic ground Comparator 2 output Bridge 1 current output Bridge 1 current input Bridge 1 current ground
TCFET BSC VI V5 B5 V5A B5A ERD WLP WDT UVW RESAN
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4849B-AUTO-09/05
Table 2-1.
Pin 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Pin Description (Continued)
Symbol B2CO B2CI B2CG C2I OUTN C1I RD4 RD3 GNDP RD2 RD1 V12S V12 OUTP WLN TCFET BSC VI V5 B5 V5A B5A ERD WLP WDT UVW RESAN Function Bridge 2 current output Bridge 2 current input Bridge 2 current ground Comparator 2 input Low-side driver output Comparator 1 input Relay driver 4 output Relay driver 3 output Power ground Relay driver 2 output Relay driver 1 output 12V switch 12V supply voltage High-side driver output Warning lamp output Test current FET Bootstrap capacitor Internal 5V supply 5V supply Base 5V supply Auxiliary 5V supply Base auxiliary 5V supply Enable relay driver input Warning lamp polarity input Watchdog trigger input Undervoltage warning output Auxiliary reset output
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ATA6814 [Preliminary]
4849B-AUTO-09/05
ATA6814 [Preliminary]
3. Absolute Maximum Ratings
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Parameters Supply voltage Supply voltage Voltage at pins CLK, DI, E5, ERD, WDT, WLP, CSN, RSTN, VRE, DO, C1O, C2O, RESN, RESAN, UVR, UVW, RREF, VI, TEST, B1CI, B1CG, B1CO, B2CI, B2CG, B2CO, RCOS Current in pins CLK, DI, E5, ERD, WDT, WLP, CSN, RSTN, VRE, DO, C1O, C2O, RESN, RESAN, UVR, UVW, RREF, VI, TEST, B1CI, B1CG, B1CO, B2CI, B2CG, B2CO, RCOS Voltage at RD1, RD2, RD3, RD4, WLN, OUTN, OUTP, EK15, BSC, TCFET, UVM Current in RD1, RD2, RD3, RD4, WLN, OUTN Current in OUTP Voltage at V5, V5A Current in V5 Current in V5A Voltage at V12S Current in V12S ESD protection at all pins MIL-STD-883, Method 3015, HBM 100 pF discharged through 1.5 k Operation Peak t < 500 ms Condition Symbol V12 V12 Min. -0.3 -0.3 Max. +26 +45 Unit V V
V() V5 + 0.3V
V()
-0.3
+5.5
V
I()
-10
+10
mA
V() I() I() V() I() I() V() I() Vd() Tj,op Tj,peak Ts
-0.3 -150 -10 -0.3 -150 -50 -0.3 -60
+45 +150 +10 +5.5 +10 +10 +45 +10 2
V mA mA V mA mA V mA kV C C C
Junction temperature Storage temperature
-40 -40 -55
+150 +165 +125
4. Thermal Resistance
Parameters Operating ambient temperature range Thermal resistance, chip to case Soldering temperature Condition Symbol Tamb RthJC Tms Min. -40 Max. +105 10 260 Unit C K/W C
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4849B-AUTO-09/05
5. Electrical Characteristics
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 1 Total Device All functions Reduced operation mode(1) V12 Standby, V12 = 14V, I(V5A) = -10 A V12 WLN, OUTN, RD1 to RD4 OUTP, V12S, BSC V5 V5A CSN RSTN CSN RSTN CLK, DI, E5, ERD, WDT WLP CLK, DI, E5, ERD, WDT WLP CSN RSTN CLK, DI, E5, ERD, WDT, WLP CLK, CSN, DI, E5, ERD, RSTN, WDT, WLP CLK, CSN, DI, E5, ERD, RSTN, WDT, WLP Vt()hys = Vt()hi - Vt()lo CLK, CSN, DI, E5, ERD, RSTN, WDT, WLP C1O, C2O, VRE, DO, RESAN, RESN, UVW V12 I(V12) I(V12) Ilk()lo,stb Ilk()hi,stb I(V5) I(V5A) Ipu() Ipu() Ipu() Ipu() Ipd() Ipd() Ipd() Ipd() Vpu() Vpu() Vpd() -100 -100 -200 -200 10 10 20 20 -0.6 -0.6 0.6 -1 -1 6.5 5.8 26 6.5 10 80 +1 +1 0.5 50 -10 -10 -20 -20 100 100 200 200 V V mA A A A mA A A A A A A A A A V V V A A A A A A A A A A A A A A A A A A Permissible supply 1.1 voltage 1.2 Supply current 1.3 Supply current Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
1.4 Leakage current low V() = 0V to V12, V12 = 14V 1.5 Leakage current high 1.6 Supply current 1.7 Supply current V() = 0V to V12, V12 = 14V V(BSC) = 14V All V5 based I/O pins open RESAN open
1.8 Pull-up current to V5 V() = 0.7 x V5 1.9 Pull-up current to VI V() = 0.7 x VI 1.10 Pull-up current to V5 V() = 0V 1.11 Pull-up current to VI V() = 0V 1.12 Pull-down current 1.13 Pull-down current 1.14 Pull-down current 1.15 Pull-down current V() = 0.2 x V5 V() = 0.2 x VI V() = V5 V() = VI
Vpu() = V() - V5, 1.16 Pull-up voltage to V5 I() = -10 A 1.17 Pull-up voltage to VI 1.18 Pull-down voltage Input threshold voltage high Input threshold voltage low Input hysteresis voltage Saturation voltage low Vpu() = V() - VI, I() = -10 A I() = 10 A
1.19
Vt()hi
2
V
A
1.20
Vt()lo
0.85
V
A
1.21
Vt()hys
0.2
1
V
A
1.22
I() = 0.1 mA, outputs low
Vs()lo
0.2
V
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
8
ATA6814 [Preliminary]
4849B-AUTO-09/05
ATA6814 [Preliminary]
5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 1.23 Saturation voltage low Saturation voltage high Saturation voltage high Saturation voltage high Saturation voltage high Test Conditions I() = 1.6 mA, outputs low Vs() = V5 - V(), I() = -0.1 mA, outputs high Vs() = V5A - V(), I() = -0.1 mA, RESAN high Vs() = V5 - V(), I() = -1.6 mA, outputs high Vs() = V5A - V(), I() = -1.6 mA, RESAN high Cload = 10 pF, V() from low = 10% -> high = 90% V5 Cload = 10 pF, V() from low = 10% -> high = 90% V5A Cload = 10 pF, V() from high = 90% -> low = 10% V5 Cload = 10 pF, V() from high = 90% -> low = 10% V5A DO = off, V() = 0V to V5 V() = V5, pins = low V() = V5A, RESAN = low Pin C1O, C2O, VRE, DO, RESAN, RESN, UVW C1O, C2O, DO, RESN, UVW RESAN C1O, C2O, DO, RESN, UVW RESAN C1O, C2O, DO, RESN, UVW Symbol Vs()lo Min. Typ. Max. 0.4 Unit Type* V A
1.24 1.25 1.26 1.27
Vs()hi Vs()hi Vs()hi Vs()hi
0.5 0.5 1 1
V V V V
A A A A
1.28 Rise time
tr()
200
ns
B
1.29 Rise time
RESAN
tr()
200
ns
B
1.30 Fall time
C1O, C2O, DO, RESN, UVW
tf()
200
ns
B
1.31 Fall time 1.32 Leakage current 1.33 1.34 Short circuit current low Short circuit current low Short circuit current high Saturation voltage high Saturation voltage high Short circuit current low
RESAN DO C1O, C2O, DO, RESN, UVW RESAN C1O, C2O, VRE, DO, RESAN, RESN, UVW VRE VRE VRE
tf() I()lk Isc()lo Isc()lo -10 8 8
200 +10 40 40
ns A mA mA
B A A A
1.35
V() = 0V, pins = high Vs() = VI - V(), I() = -0.1 mA, VRE high Vs() = VI - V(), I() = -1.6 mA, VRE high V() = VI, VRE = low Cload = 10 pF, V() from low = 10% -> high = 90% VI Cload = 10 pF, V() from high = 90% -> low = 10% VI
Isc()hi
-30
-8
mA
A
1.36 1.37 1.38
Vs()hi Vs()hi Isc()lo 8
0.5 1 40
V V mA
A A A
1.39 Rise time
VRE
tr()
200
ns
B
1.40 Fall time
VRE
tf()
200
ns
B
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
9
4849B-AUTO-09/05
5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 2 3 3.1 3.2 Bandgap, Bias RREF = 10 k 2% Overcurrent in WLN, OUTN or OUTP for t > 200 s Overcurrent in WLN, OUTN or OUTP for t > 200 s RREF V(RREF) 1.18 1.23 1.28 V A Temperature Monitoring Thermal shutdown temperature Thermal re-entry temperature Thermal shutdown temperature Thermal re-entry temperature Enable/Standby EK15 EK15 EK15 EK15 EK15 RiEK15 VEK15on VEK15off VEK15hys te(EK15) 1.5 200 1 600 6 60 100 150 2.5 k V V mV A A A A A Upper enable threshold Lower enable threshold T1off T1on T1hys T2off T2on T2hys 120 105 5 140 125 5 12 145 135 20 165 155 20 C C C C C C A A A A A A 2.1 Voltage at RREF Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
3.3 Thermal hysteresis 1 T1hys = T1off - T1on 3.4 3.5
3.6 Thermal hysteresis 2 T2hys = T2off - T2on 4 4.1 Input resistor 4.2 4.3
4.4 Enable hysteresis Enable time based 4.5 on watchdog oscillator period 5 5.1 5.2 5.3 5.4 5.5 5.6 5.7 V12 Voltage Monitoring Lower undervoltage threshold Upper undervoltage threshold Undervoltage hysteresis Lower overvoltage threshold Upper overvoltage threshold Overvoltage hysteresis Under/overvoltage filter time VtOhys = VtOhi - VtOlo VtUhys = VtUhi - VtUlo
V12 V12 V12 V12 V12 V12 V12
VtUlo VtUhi VtUhys VtOlo VtOhi VtOhys tfi
4.8 5.8 200 26 32 0.5 50 1.8 100 600
V V mV V V V s
A A A A A A A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
10
ATA6814 [Preliminary]
4849B-AUTO-09/05
ATA6814 [Preliminary]
5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 6 Linear Regulator I(V5) = -150 mA to 0 mA, (NPN) > 120 mA, Uce,sat(NPN) < 0.8V, fT > 100 MHz Ube(NPN) < 0.8V at -40C, Ube(NPN) < 0.7V at 27C, Ube(NPN) < 0.6V at 105C V12 = 8V to 18V, I(V5) = -150 mA V12 = 14V, I(V5) = -50 mA to -150 mA Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
6.1 Output voltage
V5
V5
4.85
5
5.15
V
A
6.2 Line regulation 6.3 Load regulation 6.4 Allowed capacitor 6.5 Allowed capacitor 6.6 6.7 6.8 6.9 6.10 6.11 Lower threshold undervoltage Upper threshold undervoltage Lower threshold overvoltage Upper threshold overvoltage Hysteresis Under/overvoltage Under/overvoltage filter time
V5 V5 V5 V5
V5lir V5lor CV5 ESR,CV5 VtU(V5)low VtU(V5)hig h VtO(V5)low VtO(V5)hig h Vt(V5)hys tfi(V5) Isc(B5) Rpd(B5) Ipd(B5)
-10 -20 7 0.5 4.5
+10 +20 22 10
mV mV F V
A A C C A A A A A A A A A
RESN = low RESN = high RESN = high RESN = low
V5 V5 V5 V5 V5 V5
4.8 5.2 5.5 50 8 1.5 50 10 200 30 8 250 50
V V V mV s mA k A
6.12 Short circuit current 6.13 Pull-down resistor 6.14 Pull-down current
V(B5) = 0V V(B5) = 1V V(B5) = 6V Vs(B5) = V12 - V(B5), V12 = 5.8V to 6.5V, I(B5) = -1.25 mA Tj = -40C Tj = 27C Tj = 105C
B5 B5 B5
6.15
Saturation voltage high
B5
Vs(B5)high
0.15 0.25 0.35
V V V
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
11
4849B-AUTO-09/05
5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 7 Test Conditions I(V5A) = -30 mA to 0 mA, (NPN) > 200, Uce,sat(NPN) < 1V, Ube(NPN) < 0.8V at -40C, Ube(NPN) < 0.7V at 27C, Ube(NPN) < 0.6V at 105C V12 = 8V to 18V, I(V5A) = -30 mA V12 = 14V, I(V5A) = -10 mA to -30 mA Pin Symbol Min. Typ. Max. Unit Type* V5A Auxiliary Linear Regulator
7.1 Output voltage
V5A
V5A
4.65
5
5.35
V
A
7.2 Line regulation 7.3 Load regulation 7.4 Minimum capacitor 7.5 Minimum capacitor Lower threshold 7.6 undervoltage 7.7 7.8 7.9 7.10 7.11 Upper threshold undervoltage Lower threshold overvoltage Upper threshold overvoltage Hysteresis under/ overvoltage Under/overvoltage filter time
V5A V5A V5A V5A
V5Alir V5Alor CV5A ESR,V5A VtU(V5A) low VtU(V5A) high VtO(V5A) low VtO(V5A) high Vt(V5A) hys tfi(V5A) Isc(B5A) Rpd(B5A) Ipd(B5A)
-10 -20 3.3 0.5 4
+10 +20 10 10
mV mV F V
A A C C A A A A A A A A A
RESAN = low RESAN = high RESAN = high RESAN = low
V5A V5A V5A V5A V5A
4.6 5.4 6 50 8 0.3 50 10 200 30 1.5 250 50
V V V mV s mA k A
Not in standby mode V(B5A) = 0V V(B5A) = 1V V(B5A) = 6V Vs(B5A) = V12 - V(B5A), V12 = 5.8V to 6.5V, I(B5A) = -150 A Tj = -40C Tj = 27C Tj = 105C
V5A B5A B5A B5A
7.12 Short circuit current 7.13 Pull-down resistor 7.14 Pull-down current
7.15
Saturation voltage high
B5A
Vs(B5A) hi
0.35 0.45 0.55
V V V
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
12
ATA6814 [Preliminary]
4849B-AUTO-09/05
ATA6814 [Preliminary]
5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 8 Test Conditions C(VI) = 100 nF, I(VI) = -1 mA to 0 mA RESN = low RESN = high RESN = high RESN = low Pin Symbol Min. Typ. Max. Unit Type* Internal Voltage Supply VI VI VI VI VI VI VI VI VI = 0V I(BxCO) = 20 A, BxCO = low I(BxCO) = -750 A, BxCO = high, Vs(BxCO)hi = V5 - V(BxCO) VI BxCO VI VtUlo VtUhi VtOlo VtOhi VtUhys VtOhys Isc() Vs()lo 0.4 50 20 -10 5.4 6 1 200 150 +30 4.35 3 4.3 5.35 V V V V V V mV mA mV A A A A A A A A A
8.1 Output voltage 8.2 8.3 8.4 8.5 8.6 8.7 Lower threshold undervoltage Upper threshold undervoltage Lower threshold overvoltage Upper threshold overvoltage Hysteresis undervoltage Hysteresis overvoltage
8.8 Short-circuit current 9 9.1 Output voltage low
Current Measurement, x = 1, 2
9.2 Saturation voltage
BxCO
Vs()hi
100
mV
A
9.3 9.4
Short-circuit current BxCO = low, V(BxCO) = V5 low Short-circuit current BxCO = high, high V(BxCO) = 0V
BxCO BxCO
Isc()lo Isc()hi
0.5 -25
2 -2.5
mA mA
A A
Vos() = V(BxCI) - V(BxCG) Input offset voltage T = -40C 9.5 V(BxCO) - (V(BxCI) j Tj = 27C - V(BxCG)) Tj = 105C 9.6 Leakage current 9.7 Input voltage range V(BxCI), V(BxCG) = Difference in leakage -0.7V to +0.35V, current dIlk(BxCI, BxCG), V(BxCI), V(BxCG) = -0.7V to +0.35V
BxCO
Vos()
-3.5 -3 -3.5 -1.75 -0.7 -1
+3.5 +3 +3.5 -0.25 +0.35
mV mV mV A V
A
BxCI BxCG BxCI BxCO B1CI, B1CG and B2CI, B2CG
Ilk() Vi()
A A
9.8
dIlk()
-0.25
+0.25
A
A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
13
4849B-AUTO-09/05
5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters Test Conditions I(RDx) = 150 mA, T < Toff Tj = -40C Tj = 27C Tj = 105C V(RDx) = 2V to V12, T < Toff V(RDx) = 0V to 40V, T < Toff I(RDx) = 10 mA, RDx = high, L = 0.2H ROS = 100 k 1%, COS = 1 nF 5% ROS = 100 k 1%, COS = 1 nF 5% ROS = 100 k 1%, COS = 1 nF 5% I(WLN) = 20 mA, WLN = low Pin Symbol Min. Typ. Max. Unit Type* 10 Relay Driver RDx, x = 1 to 4 Saturation voltage 10.1 low Short circuit current low 0.4 0.5 0.6 250 -5 42 300 400 +5 60 V V V mA A V
RDx
Vs()lo
A
10.2
RDx RDx RDx
Isc()lo Ilk() Vf()
A A A
10.3 Leakage current 10.4 Free-wheeling voltage
11 Watchdog 11.1 Upper window time 11.2 Lower window time 11.3 Watchdog timeout 12 Warning Lamp WLN 12.1 12.2 12.3 Saturation voltage low WLN WLN WLN WLN WLN WLN V(WLN) = 0V to 40V, WLN = high I(WLN) > Isc(WLN)lo, T > T1off V(WLN) from high = 90% -> low = 10% V12 I(WLN) = 10 mA, WLN = high, L = 10 H WLN WLN WLN WLN Vs()lo Isc()lo Ith()hi Ith()lo Ithhys Vth() Ilk() tfi() tf() Vf() 42 8 0.25 2.25 -10 100 1.5 2.75 +10 200 10 60 20 30 0.4 50 12 V mA mA mA mA V A s s V A A A A A A A A B A WDT WDT WDT Tu(WDT) Tl(WDT) Tt(WDT) 22.2 16.4 59.7 24.6 18 64.6 27 19.8 71 ms ms ms A A A
Short-circuit current V(WLN) = 1V to V12, low WLN = low Threshold current high
12.4 Threshold current low Hysteresis threshold 12.5 current 12.6 Threshold voltage detection
12.7 Leakage current 12.8 Overcurrent filter time 12.9 Fall time 12.10 Free-wheeling voltage
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
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5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 13 Reset 13.1 Reset pulse duration 13.2 Reset pulse duration 14 Low-side Driver OUTN 14.1 14.2 14.3 Saturation voltage low I(OUTN) = 60 mA, OUTN = low, T < Toff OUTN OUTN OUTN OUTN OUTN OUTN V(OUTN) = 0V to 40V, OUTN = high I(OUTN) > Isc(OUTN)lo, T > T1off V(OUTN) from high = 90% -> low = 10% V12 I(OUTN) = 10 mA, OUTN = high, L = 10 H Vs(OUTP) = V12 V(OUTP), I(OUTP) = -10 mA, OUTP = high, T < Toff V(OUTP) = 0V to V12 - 2V, OUTP = high OUTN OUTN OUTN OUTN Vs()lo Isc()lo Ith()hi Ith()lo Ithhys Vth() Ilk() tfi() tf() Vf 42 8 0.25 2.25 -10 100 1.5 2.75 +10 200 10 60 60 90 1.2 120 12 V mA mA mA mA V A s s V A A A A A A A A B A RESN RESAN tl(RESN) tl(RESAN) 5.2 0.1 7.7 1 ms ms A A Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
Short-circuit current V(OUTN) = 2V to V12, low OUTN = low Threshold current high Hysteresis threshold current Threshold voltage detection
14.4 Threshold current low 14.5 14.6
14.7 Leakage current 14.8 Overcurrent filter time 14.9 Fall time 14.10 Free wheeling voltage
15 High-side Driver OUTP 15.1 Saturation voltage high OUTP Vs()hi 1 V A
15.2 Short-circuit current 15.3 Threshold current high Hysteresis threshold current
OUTP OUTP OUTP OUTP
Isc()hi Ith()hi Ith()lo Ithhys Ilk() tfi() tr()
-25 -5
-15
-10
mA mA
A A A A A A B
15.4 Threshold current low 15.5
-2 -1 -10 100 -0.1 +10 200 10
mA mA A s s
15.6 Leakage current 15.7 Overcurrent filter time 15.8 Rise time
V(OUTP) = 0V to V12, OUTP = low I(OUTP) > Isc(OUTP)hi, T > T1off V(OUTP) from low = 10% -> high = 90% V12
OUTP OUTP OUTP
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
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5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters Test Conditions ROS = 100 k 1%, COS = 1 nF 5% No reset, f - 1/(2 x ROS x COS) COS = 1 nF Pin Symbol Min. Typ. Max. Unit Type* 16 Watchdog Oscillator RCOS 16.1 Oscillator frequency 16.2 Permissible frequency range RCOS RCOS RCOS RCOS RCOS RCOS fOSC fOSC ROS COS Isc()lo Ilk() 9 0.9 20 1 1 -5 10 11 55 100 10 4 +5 kHz kHz k nF mA A A A A A A A
16.3 Permissible resistor
16.4 Permissible capacitor ROS = 100 k 16.5 Short-circuit current V(RCOS) = VI low V(RCOS) = 0% to 63.2% VI
16.6 Leakage current 17 Main Oscillator 17.1 Main oscillator frequency Threshold voltage detection
RREF = 10 k 2%
fmosC
82.5
100
120
kHz
A
18 Comparator Cxl, x = 1, 2 18.1 CxI V(CxI) = 0V to V5 dv/dt > 1V/s Vo(TCFET) = V(TCFET) - V12, V12 > 6.5V, I(TCFET) = -20 A to 0 A CxI CxI Vth(CxI) Ilk(CxI) tpd(Cx) 1.1 -10 1.23 1.4 +10 20 V A s A A B
18.2 Leakage current 18.3 Propagation delay 19 TCFET 19.1 Output voltage
TCFET
Vo()
4.5
10
V
A
19.2
Short-circuit current V(BSC) = 0V to V12 - 3V high Saturation voltage high Saturation voltage low Vd() = V(BSC) - V(TCFET), TCFET = high, I(TCFET) = -20 A TCFET = low, I(TCFET) = 50 A
BSC
Isc(BSC)hi
1
25
mA
A
19.3
BSC
Vs()hi
1.5
V
A
19.4 19.5 19.6
TCFET TCFET TCFET BSC
Vs()lo Isc()hi Isc()lo Ilk() -250 100 -10 -50 150
200 -25 200 +10
mV A A A
A A A A
Short-circuit current V(TCFET) = 0V, high TCFET = high Short-circuit current V(TCFET) = 2V to V12, low TCFET = low V(BSC) = V12 to 36V, TCFET = low
19.7 Leakage current
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
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5. Electrical Characteristics (Continued)
Operating conditions: V12 = 6.5V to 26V, V5 = 5V 3%, RREF = 10 k 2%, Tj = -40C to 150C, unless otherwise specified. No. Parameters 20 V12S Switch 20.1 Saturation voltage high Vs(V12S) = V12 - V(12S), V12S = high, T < T2off, I(V12S) = -60 mA V12S Vs()hi 0.36 1.2 V A Test Conditions Pin Symbol Min. Typ. Max. Unit Type*
20.2
Short-circuit current V(V12S) = 0V to V12 - 2V, high V12S = high V(V12S) = 0V to V12, V12S = low
V12S V12S
Isc()hi Ilk()
-150 -10
-90
-60 +10
mA A
A A
20.3 Leakage current
21 UVM Voltage Monitoring 21.1 Input voltage range 21.2 Threshold on V(K30, UVM) R(K30, UVM) = 511 2% UVM UVM UVM Vir(UVR) Vt(K30, UVM) Ri(UVM) Vt(UVR) hys Ilk(UVR) Ilk(UVM) stb 0.3 x V5 2.9 x UVR 60 0.02 x UVR -5 -5 3.0 x UVR 100 0.9 x V5 3.1 x UVR 150 0.06 x UVR +5 +5 A A k A A A
21.3 Input resistor Undervoltage reference hysteresis 21.4 based on V(K30, UVM) 21.5 Leakage current 21.6 Leakage current V(UVR) = 0V to V5 V(UVM) = 0V to V12, standby
UVM
A
UVR UVM
A A
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter Note: 1. Reduced operation mode means either - RDSON of drivers could be higher than specified or - Voltage at pin TCFET could be beyond specified limits
6. Operating Conditions: SPI Interface
V12 = 5.8V to 26V; Tamb = -40C to 105C Parameters Cycle time Low cycle time High cycle time Setup time: DI stable before CLK high to low Hold time: DI stable after CLK high to low Access time: DO stable after CLK high to low Valid time: DO stable before CLK high to low Symbol tcycle tcycle,lo tcycle,hi tsetup thold taccess tvalid Min. 0.5 150 150 100 100 100 100 Max. 12.5 Unit s ns ns ns ns ns ns
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7. Functional Description
7.1 Bandgaps
For voltage monitoring and as references for various voltage regulators, two independent bandgaps are used. The bandgaps for the generation and monitoring of the internal supply (V5 and V5A) are used in cross-over mode.
7.2
Bias
The external resistor at RREF defines a current reference for all blocks and determines main oscillator frequency. The current through the external resistor is monitored and in case of malfunction (pin open or short to ground; current is less than 0.25 times or greater than 8 times nominal value), a bias failure is detected (see Table 7-9 on page 25).
7.3
Temperature Monitoring
To protect the circuit from extensive temperature in error condition, two temperature levels are implemented to switch off various blocks. At the lower temperature level, the outputs WLN, OUTN or OUTP are switched off after a debounce time, if the corresponding driver is in current limitation. The Warning Lamp is switched on above the upper temperature level. All other drivers and the linear regulators will switch off. If the temperature level falls below the shutdown temperature (hysteresis), all drivers except TCFET and the relay drivers will go to their previous state.
7.4
Enable/Standby
The power consumption of ATA6814 is reduced to a minimum via inputs E5 or EK15 (sleep mode). With the signal TEN via SPI command, the inputs E5 and EK15 can be overwritten and the ATA6814 will stay active (keep-alive function). The status of EK15 can be read via SPI.
Table 7-1.
E5 High x Low Low
Enable/Standby Table
EK15 x High Low Low TEN (SPI) x x High Low ATA6814 Active Active Active Standby
7.5
V12 Voltage Monitoring
The system supply is checked for overvoltage and undervoltage at the internal voltage divider. If the voltage exceeds the limits, the drivers are switched off and a reset at RESN and RESAN is generated (see Table 7-9 on page 25).
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7.6 5V Linear Regulators
The ATA6814 offers two independent 5V supplies. The main supply (V5) is available only in active mode while the auxiliary 5V supply (V5A) is active all the time. The ATA6814 activates the basis of external bipolar transistors via pins B5 and B5A. The currents of the regulators V5 (150 mA) and V5A (30 mA), defined in the datasheet, can only be achieved if the external transistors fulfil certain requirements in terms of current amplification and transit frequency. Especially for V12 = 5.8V a low saturation voltage of B5 and B5A in combination with the forward diode voltage and a low saturation voltage (Uce,sat) of the external bipolar transistors is required. For fast load changes at V5 a high transit frequency is necessary (typically fT > 100 MHz). For voltage monitoring and as references for the voltage regulators two independent bandgaps are used. The voltage monitoring functions of V5 and V5A generate a reset pulse at RESN and RESAN if the limits are exceeded (see Table 7-9 on page 25). For internal voltage supply, an additional linear regulator (VI) is implemented.
7.7
Current Measurement
The ATA6814 contains two differential amplifiers for current measurement. The input signal of each amplifier is a voltage drop over an external current sense resistor. The amplification, defined by the ratio of external resistors, provides a reasonable signal for the following A/D converter. The output is limited to V5.
7.8
Relay Driver
The ATA6814 features four current-limited relay drivers for motor direction control relays. The relays are controlled by an SPI command and the input of the enable relay driver (ERD). Error conditions disable the relays permanently (see Table 7-9 on page 25). Table 7-2.
Low Low High High x
Relay Status Table
TRD2 (SPI) Low High Low High x ERD x High High High Low RD1 Open drain Open drain Low Open drain Open drain RD2 Open drain Low Open drain Open drain Open drain
TRD1 (SPI)
Table 7-3.
Low Low High High x Note:
Relay Status Table
TRD4 (SPI) Low High Low High x ERD x High High High Low RD3 Open drain Open drain Low Open drain Open drain RD4 Open drain Low Open drain Open drain Open drain
TRD3 (SPI)
The simultaneous activation of the relay drivers RD1 and RD4 or RD2 and RD3 is not possible (see Table 7-2 and Table 7-3). This feature ensures that if ATA6814 is used in DC motor application, the motors can only operate in the same direction.
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7.9
Watchdog
The open loop watchdog (window comparator) compares each time interval between a falling and a rising edge with a given reference time interval. The lower window time is between 90 x t WD and 91 x t WD and the upper window time is between 122 x t WD and 123 x t WD (tWD = 2/fOSC). The watchdog includes an error counter WDC(2:0) which is incremented by one when there are valid trigger events and decremented by three when there are watchdog errors. If the counter reaches a value of zero (state S0: 000), the warning lamp will be switched on. Relay drivers, TCFET-, low- and high-side drivers are disabled. With a counter value greater than or equal to seven (state S7: 111), the watchdog stops affecting the drivers. In the case of a watchdog timeout (322 x tWD to 323 x tWD), the error counter is immediately set to zero. The initial state of the watchdog counter after power-up or if RESN is low is 110 (state S6). The watchdog can be reset by RSTN. Figure 7-1. State Diagram
bad
good
S1 001
S2 010
bad | timeout good good bad | timeout bad good
S3 011
bad | timeout
S0 000
timeout
S7 111
good
timeout timeout
timeout
good
bad
S4 100
good
S6 110 S5 101
good
bad bad
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7.10 Warning Lamp
The ATA6814 features a watchdog-controlled output, WLN, which can be used to switch a warning lamp. Depending on the warning lamp polarity pin (WLP), the warning lamp output is switched either to low level or to open drain, when a Warning lamp request (that is, On in Table 7-9 on page 25, column WLN) occurs or the corresponding SPI command is transmitted. For the behavior of WLN output refer to Table 7-4. The driver is short-circuit proof and will switch off after a debounce time. An activation of the warning lamp due to Warning lamp request is suppressed for 768 x tWD after wake-up to avoid a flickering of the warning lamp during the start-up phase (exception: lower thermal threshold level reached). The driver also has a current sensor and a voltage monitoring which sets SPI flags if the corresponding thresholds are reached. Warnlamp is open drain during suppression time after wake-up. If the oscillator does not work 4 ms after start up, the internal oscillator watchdog timeout is reached and the warning lamp is switched on.
Table 7-4.
Warnlamp Request Yes Yes Yes Yes No No Yes Yes Yes No No No No x
Warning Lamp Status Table
Overcurrent in WLN Occurred x x No No x x Yes x No x x Yes No x Thermal Threshold #1 Reached No No Yes Yes No No Yes No Yes No No Yes Yes x Suppression Time After Wake-up/VI Reset t < 768 x tWD t > 768 x tWD t < 768 x tWD t > 768 x tWD t > 768 x tWD x x x x t > 768 x tWD x x x x
TWLN (SPI) x x x x High Low x x x High Low High High x
V12 > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V > 4.8V < 4.8V
WLP Low Low Low Low Low Low Low High High High High High x x
WLN Open drain Low Open drain Low Low Open drain Open drain Open drain Open drain Low Open drain Open drain Open drain Open drain
7.11
Reset
When V12, VI, V5 or V5A are beyond their corresponding normal operating range or the temperature has reached the upper temperature level, a reset is indicated at the outputs RESN (640 x tmos; tmos = 1/fmos) and RESAN. Additionally, RESAN can be activated by an SPI command. Via input RSTN, the SPI Interface and the watchdog can be reset by an external signal (see Table 7-9 on page 25).
7.12
SPI Interface
The ATA6814 supports an 8-bit SPI interface to communicate with the microprocessor. The MSB is transmitted first. There are two status registers (address 0xxxxx01 and 0xxxxx10) and two control registers (address 1xxxxx01 and 1xxxxx10).
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Table 7-5.
Bit 7 6 5
Status Register 0xxxxx01 Request by Microprocessor
Name C1O EK15S WLPS Meaning Comparator 1 output EK15 status Warnlamp polarity status Function 0: comparator C1I below threshold 1: comparator C1I above threshold 0: EK15 below threshold 1: EK15 above threshold 0: pin WLP = low 1: pin WLP = high 0: normal operation 1: overtemperature present or overtemperature detection switched off 0: watchdog OK 1: watchdog failure Status of watchdog counter
4
OTS
Overtemperature status
3 2:0
WDOK WDC(2:0)
Watchdog status Watchdog counter bit 2:0
Table 7-6.
Bit 7 6 5 4 3 2 1 0
Status Register 0xxxxx10 Request by Microprocessor
Name WLNOC ONOC OPOC WLNCS ONCS OPCS WLNVS ONVS Meaning Warnlamp overcurrent OUTN overcurrent OUTP overcurrent Warnlamp current status OUTN current status OUTP current status Warnlamp voltage status OUTN voltage status Function 0: no overcurrent 1: overcurrent 0: no overcurrent 1: overcurrent 0: no overcurrent 1: overcurrent 0: current below threshold 1: current above threshold 0: current below threshold 1: current above threshold 0: current below threshold 1: current above threshold 0: voltage below threshold 1: voltage above threshold 0: voltage below threshold 1: voltage above threshold
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Table 7-7.
Bit 7 6 5 4 3
Control Register 1xxxxx01 Sent by Microprocessor
Name TWLN Meaning Trigger warning lamp Trigger OUTN Trigger OUTP Trigger enable (keep alive) Trigger V12 switch Trigger undervoltage reference - Function 0: WLN = off 1: WLN = on 0: OUTN = off 1: OUTN = on 0: OUTP = off 1: OUTP = on 0: no keep alive 1: keep alive 0: V12S = off 1: V12S = V12 0: if UVM < 3 x UVR => UVW = low 0: if UVM > 3 x UVR => UVW = high 1: UVW = low - No function Set OTS = high if overtemperature => OTS = high, else low Comment See Table 7-4 on page 21 and Table 7-9 on page 25 See Table 7-10 and Table 7-11 on page 26 See Table 7-10 and Table 7-11 on page 26 See Table 7-1 on page 18 Used in Testmode 3 see Table 7-9 on page 25
TOUTN TOUTP TEN TV12S
2 1 0 Note:
TUVR - OTDE
Overtemperature 0: temperature detection off detection enable 1: temperature detection on
Bold: default state after reset by RSTN = low
Table 7-8.
Bit 7 6 5 4 3 2 1 0 Note:
Control Register 1xxxxx10 Sent by Microprocessor
Name Meaning Trigger test current FET Trigger RESAN - Trigger relay driver 4 Trigger relay driver 3 Trigger relay driver 2 Trigger relay driver 1 Function 0: TCFET = off 1: TCFET = on 0: default 1: RESAN = reset (low) - 0: RD4 = off 1: RD4 = on if RD3 = off 0: RD3 = off 1: RD3 = on if RD4 = off 0: RD2 = off 1: RD2 = on if RD1 = off 0: RD1 = off 1: RD1 = on if RD2 = off - No function See Table 7-2 on page 19, Table 7-3 on page 19 and Table 7-9 on page 25 No function Comment See Table 7-9 on page 25
TTCFET TRESAN - TRD4 TRD3 TRD2 TRD1
- - Bold: default state after reset by RSTN = low
For operation of SPI communication see the following timing diagrams (see Figure 7-2 and Figure 7-3 on page 24). With a low signal at CSN, the ATA6814 will be selected for communication by the microprocessor. With clock pulses at CLK, the address and data transfer will be synchronized. DI is the input for address and data from the microprocessor to ATA6814. The data must be valid at the falling edge of the CLK pin. DO transfers data from ATA6814 to the microprocessor.
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4849B-AUTO-09/05
The request command structure (to read a status register of ATA6814) consists of a two-byte transmission. The control command structure (to write a control register of ATA6814) consists of a three-byte transmission with eight clock pulses each and a low/high transition at CSN. The first byte is for identification. All request command ID bytes shall have a "0" in their most significant bit. The address is transmitted by the last two bits. In the second byte (which can be a dummy byte (0x00) or next command), the status register corresponding to the address of the first byte will be sent by DO. At start-up, the returned value when the first command is sent will be zero (no 'last command' available). Figure 7-2.
CSN CLK DI DO
0 X X X X X
ADR1 ADR0
Request Command Structure (Read Register)
0
X
X
X
X
X
ADR1 ADR0
DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
All control command ID bytes shall have a "1" in their most significant bit. The address is transmitted by the last two bits. The second byte is the data byte which contains the control data for the send command. With the second low to high transition of CSN the data is stored in ATA6814. The SPI logic monitors for faulty communication. To check which data is received at ATA6814 in the second and third clock cycle, the address and data are sent back to the microprocessor and tested to verify that the transmission was correct. The first data byte at DO is the response byte of the last command while the third DI byte is the address for the next data. If there is no next command, the address can be set to 0x00. Figure 7-3.
CSN CLK DI DO
1 X X X X X
ADR1 ADR0 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 ADR7 DATA7 ADR1 ADR0
Control Command Structure (Write Register)
ADR7 ADR6 ADR5 ADR4 ADR3 ADR2 ADR1 ADR0
DATA1 DATA0
The 8 CLK pulses must be received when CSN is triggered, otherwise the address and/or data will be ignored and zeros will be returned on DO. The minimum time for receiving during CSN = low is t 100 s; otherwise, a timeout expires and the receiving is stopped. Any received data is ignored. Therefore, the minimum clock frequency is 80 kHz for SPI transmission.
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7.13 External Voltage Regulator VRE
The ATA6814 can control an external voltage regulator with enable input. The VRE output provides the same logic as for the V5 regulator (see Table 7-9). For V5 voltage monitoring, the external generated voltage must be connected to V5. Table 7-9.
Event Standby V12 undervoltage VI undervoltage VI overvoltage Oscillator/bias failure V12 overvoltage Reset by RSTN V5 out of range V5A out of range Short circuit WLN (overcurrent) Short circuit OUTx (overcurrent) Watchdog error
Logic Table
VI Off On On On On On On On On On On On V5 VRE Off Off Off Off Off Off On On On On On On On V5A On Off On On Off Off On On On On On On On SPI Info - No No No No No Yes No No No Yes Yes Yes WLN Off Off Off On On On On
(4)
RD1 to RD4 Off Off Off Off Off Off Off Off Off Off On/Off On/Off Off
RESN - Reset Reset Reset Reset Reset Reset No reset Reset No reset No reset No reset No reset
RESAN No reset Reset No reset No reset Reset Reset Reset No reset No reset Reset No reset No reset No reset -
V12S Off Off Off Off Off Off Off
(5)
OUTx x = N,P Off Off Off Off Off Off Off Off Off Off On/Off On/Off(1) Off Temp
TCFET Off Off Off Off Off Off Off Off Off Off On/Off On/Off Off Perm
Upper thermal threshold On
On On On Off(1) Off On
Off Off Off On/Off On/Off On/Off Temp(2)
- Off mode - - - - - Perm(3) Note: 1. Corresponding driver is switched off if thermal threshold number 1 is reached
2. Temp = temporary state, recovery when event condition is removed, except VI out of over-/undervoltage, thermal threshold number 2 reached or reset by RSTN 3. Perm = permanent state, no recovery when event condition is removed, must be re-engaged by SPI command 4. If no overcurrent in WLN 5. Not testable
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4849B-AUTO-09/05
7.14
Low-/High-side Driver
ATA6814 features two multipurpose outputs, a low-side driver OUTN and a high-side driver OUTP. Both drivers are controlled via SPI and are short-circuit proof (they will switch off after a debounce time if a short circuit is detected). During a short-circuit condition the corresponding SPI flag is set. The drivers are disabled by a watchdog error or during the reset phase. Both drivers also have an current sensor and OUTN has a voltage monitor which sets SPI flags if the corresponding thresholds are reached. Table 7-10. Logic Table for Low-side Driver
Overcurrent and Thermal Threshold Number 1 Reached No No No Yes
TOUTN (SPI) High Low x x
Watchdog OK OK Error x
OUTN Low Open drain Open drain Open drain
Table 7-11.
Logic Table for High-side Driver
Overcurrent and Thermal Threshold Number 1 Reached No No No Yes
TOUTP (SPI) High Low x x
Watchdog OK OK Error x
OUTP High Open drain Open drain Open drain
7.15
Oscillators
The watchdog oscillator provides an internal frequency of fWD = 5 kHz 10% given by external components. ROS = 100 k 1% and COS = 1 nF 5% for the watchdog. For failsafe reasons, the clock frequency is internally monitored by an oscillator with RREF = 10 k running at fOSC = 100 kHz 20%. This oscillator determines all other time constants. The watchdog oscillator frequency can be adjusted by a factor of five with the components ROS and COS according to the formula: fWD = 1/tWD where
0.632 x VI t WD = 2 x R OS x C OS x 1 + ------------------------------------------------------------ I x R - 0.684 x VI
SC OS
The first term describes charging the external RC, and the second term describes discharging. With ROS = 100 k and COS = 1 nF the period of RCOS will result to typically tosc = 100 x (1 + 0.012) s. fWD is half of the frequency measured externally at the RCOS pin. An oscillator failure generated by the oscillator watchdog occurs if the period of RCOS is smaller than tOSC or greater than 200 x tOSC, fOSC = 1/tOSC. For oscillator failure, see Table 7-9 on page 25.
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7.16 12V Switch
Via an SPI command, the voltage at pin V12 can be switched to pin V12S (see Table 7-9 on page 25). The 12V switch has a current limitation.
7.17
Comparator
The ATA6814 has two comparators. They compare inputs CxI in reference to the bandgap voltage. There are no internal pull-ups or pull-downs. The output is a V5-based push-pull stage. A hysteresis can be implemented by external resistors. Additionally, the output of comparator number 1 can be read out via SPI.
7.18
TCFET Driver
The ATA6814 features a circuit to drive an external N-channel FET. The control voltage is generated by a charge pump with bootstrap circuit for faster power-up behavior. Activation is done by an SPI command (see Table 7-9 on page 25).
7.19
UVM Voltage Monitoring
An undervoltage warning is indicated at output UVW if V12 falls below 3 x UVR. This referencevoltage level can be adjusted by an external resistor divider. The undervoltage warning can be tested with an SPI command.
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8. Ordering Information
Extended Type Number ATA6814-PLSW ATA6814-PLQW Package QFN48 QFN48 Remarks Tube, lead-free Taped and reeled, lead-free
9. Package Information
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Atmel Corporation
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600
Atmel Operations
Memory
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314
RF/Automotive
Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759
Regional Headquarters
Europe
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Microcontrollers
2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60
Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom
Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel: (33) 4-76-58-30-00 Fax: (33) 4-76-58-34-80
Asia
Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369
ASIC/ASSP/Smart Cards
Zone Industrielle 13106 Rousset Cedex, France Tel: (33) 4-42-53-60-00 Fax: (33) 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906, USA Tel: 1(719) 576-3300 Fax: 1(719) 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel: (44) 1355-803-000 Fax: (44) 1355-242-743
Japan
9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581
Literature Requests
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4849B-AUTO-09/05

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